zig

commit 605c01c2dc7cfd5449a4b175bbc6e04a0bb75207 (tree)
parent 35df61dec4f7b535a3f0cb8c9e3d4193f84d8835
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Thu,  4 Jun 2026 23:03:31 +0200

cbe: map fp to s0 in inline asm on riscv

Diffstat:
M
src/codegen/c.zig
 | 
2
++

1 file changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
@@ -4984,6 +4984,8 @@ fn airAsm(f: *Function, inst: Air.Inst.Index) !CValue {
                 (mem.eql(u8, field_name, "ccr") or mem.eql(u8, field_name, "icc") or mem.eql(u8, field_name, "xcc"))) name: {
                     // C compilers just use `icc` to encompass all of these.
                     break :name "icc";
+                } else if (target.cpu.arch.isRISCV() and mem.eql(u8, field_name, "fp")) name: {
+                    break :name "s0";
                 } else field_name;
 
             try w.print(" {f}", .{fmtStringLiteral(name, null)});