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commit 653eb7535514d06aca1eaaf777f82e1ecd968086 (tree)
parent 982510f8d565895cd6b467da092d2feb851aabe7
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Tue, 30 Jul 2024 17:42:11 +0200

start: Disable the gp initialization code for the self-hosted riscv64 backend.

Diffstat:
Mlib/std/start.zig | 22++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/lib/std/start.zig b/lib/std/start.zig @@ -272,21 +272,27 @@ fn _start() callconv(.Naked) noreturn { \\ bstrins.d $sp, $zero, 3, 0 \\ b %[posixCallMainAndExit] , + // zig fmt: off .riscv32, .riscv64 => - // The RISC-V ELF ABI assumes that `gp` is set to the value of `__global_pointer$` at - // startup in order for GP relaxation to work, even in static builds. - \\ .weak __global_pointer$ - \\ .hidden __global_pointer$ - \\ .option push - \\ .option norelax - \\ lla gp, __global_pointer$ - \\ .option pop + // The self-hosted riscv64 backend is not able to assemble this yet. + if (builtin.zig_backend != .stage2_riscv64) + // The RISC-V ELF ABI assumes that `gp` is set to the value of `__global_pointer$` at + // startup in order for GP relaxation to work, even in static builds. + \\ .weak __global_pointer$ + \\ .hidden __global_pointer$ + \\ .option push + \\ .option norelax + \\ lla gp, __global_pointer$ + \\ .option pop + else "" + ++ \\ li s0, 0 \\ li ra, 0 \\ mv a0, sp \\ andi sp, sp, -16 \\ tail %[posixCallMainAndExit]@plt , + // zig fmt: off .m68k => // Note that the - 8 is needed because pc in the jsr instruction points into the middle // of the jsr instruction. (The lea is 6 bytes, the jsr is 4 bytes.)