zig

commit 6576c3b898fb57a588c4344211c06b079a82ee91 (tree)
parent 20bd5e801826121ffa72ee54e3788bdb371b0fbc
Author: Matthew Lugg <mlugg@mlugg.co.uk>
Date:   Fri, 31 Oct 2025 13:01:42 +0000

x86_64: spill eflags when initializing bool vector

Diffstat:
M
src/codegen/x86_64/CodeGen.zig
 | 
2
++

1 file changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/codegen/x86_64/CodeGen.zig b/src/codegen/x86_64/CodeGen.zig
@@ -180028,6 +180028,8 @@ fn airAggregateInitBoolVec(self: *CodeGen, inst: Air.Inst.Index) !void {
     {
         const dst_lock = self.register_manager.lockRegAssumeUnused(dst_reg);
         defer self.register_manager.unlockReg(dst_lock);
+
+        try self.spillEflagsIfOccupied();
         try self.asmRegisterRegister(
             .{ ._, .xor },
             registerAlias(dst_reg, @min(result_size, 4)),