zig

commit 69a048623258cd4cfd091b1ffb9bb04ac6f734d7 (tree)
parent 6390ee4b8a4948a330a07392f4dd11e69b21d94b
Author: Motiejus <motiejus@jakstys.lt>
Date:   Mon,  2 Mar 2026 17:54:04 +0000

sema: fix shard simulation, bump num_passing 61→67

Fix the IP shard simulation to work for all main analysis, not just
during ensureFullMemoizedStateC. This fixes tests 61-66 (inline fn
tests and non-inline tests that reference types from preamble builtins).

Key changes:
- Move skip_dedup activation to the end of the preamble (after
  analyzeMemoizedStateC + start.zig comptime). Previously it was only
  set during ensureFullMemoizedStateC, missing tests that don't
  trigger full builtin resolution.
- Expand cc_keep range by 1 entry to include the CC ptr_nav that
  AddressSpace resolution creates as a side effect (fixing the
  1-entry excess for inline function tests).
- Remove skip_dedup clearing from ensureFullMemoizedStateC (it stays
  active for the entire main analysis).

Next blocker: test 67 (shl_sat.zig) — the shift amount type (u6 for
u32 operand) is not created. C stores the shift amount as u32(1)
instead of u6(1). Need to port shift amount type coercion.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

Diffstat:
M
stage0/corpus.zig
 | 
2
+-
M
stage0/sema.c
 | 
41
++++++++++++++++++++++++-----------------

2 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/stage0/corpus.zig b/stage0/corpus.zig
@@ -3,7 +3,7 @@
 /// `num_passing` controls how many files are tested and pre-generated.
 /// Both build.zig and stages_test.zig import this file.
 /// To enable more tests: just increment `num_passing`.
-pub const num_passing: usize = 61;
+pub const num_passing: usize = 67;
 
 pub const files = [_][]const u8{
     "stage0/sema_tests/empty.zig",
diff --git a/stage0/sema.c b/stage0/sema.c
@@ -10551,8 +10551,13 @@ static void analyzeMemoizedStateC(Sema* sema) {
 
         // Track CC (builtin 2) range: these entries are in Zig's local
         // shard and should NOT be skipped during main analysis dedup.
+        // Start 1 entry earlier to include the CC ptr_nav that
+        // AddressSpace resolution creates as a side effect (the ptr_nav
+        // for the CallingConvention declaration is created when the
+        // std.builtin namespace is scanned during AddressSpace resolution).
         if (i == 2)
-            sema->zcu->preamble_cc_start = sema->ip->items_len;
+            sema->zcu->preamble_cc_start
+                = sema->ip->items_len > 0 ? sema->ip->items_len - 1 : 0;
 
         InternPoolIndex val = ensureNavValUpToDate(sema, nav);
         if (val == IP_INDEX_NONE)
@@ -10597,18 +10602,12 @@ static void ensureFullMemoizedStateC(Sema* sema) {
         = sema->zcu->file_namespaces[sema->zcu->builtin_file_idx];
 
     // Shard simulation: clear builtins 0-4 state so they get re-resolved
-    // as fresh entries during main analysis. Ported from upstream: Zig's
-    // sharded IP keeps preamble entries in a separate shard, so main
-    // analysis creates fresh entries for builtins 0-4 types. We simulate
-    // this by enabling skip_dedup on the preamble memoized range and
-    // clearing the cached nav resolutions.
+    // as fresh entries during main analysis. The skip_dedup range is
+    // already set at preamble end (see preamble setup). Here we just
+    // clear the cached nav resolutions so ensureNavValUpToDate re-resolves
+    // builtins 0-4 with fresh IP entries.
     if (sema->zcu->preamble_memoized_end
         > sema->zcu->preamble_memoized_start) {
-        sema->ip->skip_dedup_start = sema->zcu->preamble_memoized_start;
-        sema->ip->skip_dedup_end = sema->zcu->preamble_memoized_end;
-        sema->ip->cc_keep_start = sema->zcu->preamble_cc_start;
-        sema->ip->cc_keep_end = sema->zcu->preamble_cc_end;
-
         // Clear builtins 0-4 values so they're re-resolved.
         for (int i = 0; i < 5 && i < NUM_BUILTIN_DECL_MAIN; i++)
             sema->zcu->builtin_decl_values[i] = IP_INDEX_NONE;
@@ -10653,12 +10652,6 @@ static void ensureFullMemoizedStateC(Sema* sema) {
         sema->zcu->builtin_decl_values[i] = val;
     }
 
-    // Disable shard simulation after Phase 1.
-    sema->ip->skip_dedup_start = 0;
-    sema->ip->skip_dedup_end = 0;
-    sema->ip->cc_keep_start = 0;
-    sema->ip->cc_keep_end = 0;
-
     // Phase 2: Call resolveTypeFullyC on ALL type builtins.
     // Ported from analyzeMemoizedState line 37560:
     //   try uncoerced_val.toType().resolveFully(pt);
@@ -12788,6 +12781,20 @@ SemaFuncAirList semaAnalyze(Sema* sema) {
                 sema->zcu->in_main_analysis = false;
             }
 
+            // Enable shard simulation for the entire main analysis.
+            // Ported from upstream: Zig's sharded IP keeps preamble
+            // memoized state entries in a separate shard. Any main
+            // analysis interning that matches a preamble entry will
+            // create a fresh entry instead of deduplicating.
+            if (sema->zcu->preamble_memoized_end
+                > sema->zcu->preamble_memoized_start) {
+                sema->ip->skip_dedup_start
+                    = sema->zcu->preamble_memoized_start;
+                sema->ip->skip_dedup_end = sema->zcu->preamble_memoized_end;
+                sema->ip->cc_keep_start = sema->zcu->preamble_cc_start;
+                sema->ip->cc_keep_end = sema->zcu->preamble_cc_end;
+            }
+
         } else {
             // No module root — root module is file_idx=0.
             if (sema->zcu->num_files == 0) {