zig

commit 6de9eea7bce4023ae150fb5b4d417d66b9bf13fb (tree)
parent fbd7e4506f46b73e351e1f3eb5e7cfc16ebbfc1f
Author: Veikka Tuominen <git@vexu.eu>
Date:   Tue,  7 Jun 2022 19:49:40 +0300

stage2 llvm: fix float/int conversion compiler-rt calls

Diffstat:
M
src/codegen/llvm.zig
 | 
4
++--

1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
@@ -5012,7 +5012,7 @@ pub const FuncGen = struct {
         const compiler_rt_operand_abbrev = compilerRtFloatAbbrev(operand_bits);
 
         const compiler_rt_dest_abbrev = compilerRtIntAbbrev(rt_int_bits);
-        const sign_prefix = if (dest_scalar_ty.isSignedInt()) "" else "un";
+        const sign_prefix = if (dest_scalar_ty.isSignedInt()) "" else "uns";
 
         var fn_name_buf: [64]u8 = undefined;
         const fn_name = std.fmt.bufPrintZ(&fn_name_buf, "__fix{s}{s}f{s}i", .{
@@ -9289,7 +9289,7 @@ fn needDbgVarWorkaround(dg: *DeclGen, ty: Type) bool {
 }
 
 fn compilerRtIntBits(bits: u16) u16 {
-    inline for (.{ 8, 16, 32, 64, 128 }) |b| {
+    inline for (.{ 32, 64, 128 }) |b| {
         if (bits <= b) {
             return b;
         }