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update zig_llvm.cpp and zig_llvm.h to LLVM 16

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This commit is contained in:
Andrew Kelley
2023-01-25 20:56:43 -07:00
parent 5994a5d18d
commit 740a0d8f12
4 changed files with 25 additions and 16 deletions
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4
lib/std/target.zig
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@@ -479,6 +479,9 @@ pub const Target = struct {
gnuabi64,
gnueabi,
gnueabihf,
gnuf32,
gnuf64,
gnusf,
gnux32,
gnuilp32,
code16,
@@ -855,6 +858,7 @@ pub const Target = struct {
x86,
x86_64,
xcore,
xtensa,
nvptx,
nvptx64,
le32,

1
src/codegen/llvm/bindings.zig
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@@ -1333,6 +1333,7 @@ pub const ArchType = enum(c_int) {
x86,
x86_64,
xcore,
xtensa,
nvptx,
nvptx64,
le32,

32
src/zig_llvm.cpp
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@@ -112,7 +112,7 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri
const char *CPU, const char *Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,
LLVMCodeModel CodeModel, bool function_sections, ZigLLVMABIType float_abi, const char *abi_name)
{
Optional<Reloc::Model> RM;
std::optional<Reloc::Model> RM;
switch (Reloc){
case LLVMRelocStatic:
RM = Reloc::Static;
@@ -137,7 +137,7 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri
}
bool JIT;
Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
std::optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
CodeGenOpt::Level OL;
switch (Level) {
@@ -287,11 +287,12 @@ bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machine_ref, LLVMM
// Instrumentations
PassInstrumentationCallbacks instr_callbacks;
StandardInstrumentations std_instrumentations(false);
StandardInstrumentations std_instrumentations(llvm_module.getContext(), false);
std_instrumentations.registerCallbacks(instr_callbacks);
std::optional<PGOOptions> opt_pgo_options = {};
PassBuilder pass_builder(&target_machine, pipeline_opts,
None, &instr_callbacks);
opt_pgo_options, &instr_callbacks);
LoopAnalysisManager loop_am;
FunctionAnalysisManager function_am;
@@ -415,14 +416,9 @@ ZIG_EXTERN_C LLVMTypeRef ZigLLVMTokenTypeInContext(LLVMContextRef context_ref) {
ZIG_EXTERN_C void ZigLLVMSetOptBisectLimit(LLVMContextRef context_ref, int limit) {
// In LLVM15 we just have an OptBisect singleton we can edit.
OptBisect& bisect = getOptBisector();
bisect.setLimit(limit);
// In LLVM16 OptBisect will be wrapped in OptPassGate, and will need to be set per context.
// static OptBisect _opt_bisector;
// _opt_bisector.setLimit(limit);
// unwrap(context_ref)->setOptPassGate(_opt_bisector);
static OptBisect opt_bisect;
opt_bisect.setLimit(limit);
unwrap(context_ref)->setOptPassGate(opt_bisect);
}
LLVMValueRef ZigLLVMAddFunctionInAddressSpace(LLVMModuleRef M, const char *Name, LLVMTypeRef FunctionTy, unsigned AddressSpace) {
@@ -435,8 +431,8 @@ LLVMValueRef ZigLLVMBuildCall(LLVMBuilderRef B, LLVMTypeRef Ty, LLVMValueRef Fn,
const char *Name)
{
FunctionType *FTy = unwrap<FunctionType>(Ty);
CallInst *call_inst = unwrap(B)->CreateCall(FTy, unwrap(Fn), makeArrayRef(unwrap(Args),
NumArgs), Name);
CallInst *call_inst = unwrap(B)->CreateCall(FTy, unwrap(Fn),
ArrayRef(unwrap(Args), NumArgs), Name);
call_inst->setCallingConv(static_cast<CallingConv::ID>(CC));
switch (attr) {
case ZigLLVM_CallAttrAuto:
@@ -579,7 +575,7 @@ ZigLLVMDIType *ZigLLVMCreateDebugPointerType(ZigLLVMDIBuilder *dibuilder, ZigLLV
uint64_t size_in_bits, uint64_t align_in_bits, const char *name)
{
DIType *di_type = reinterpret_cast<DIBuilder*>(dibuilder)->createPointerType(
reinterpret_cast<DIType*>(pointee_type), size_in_bits, align_in_bits, Optional<unsigned>(), name);
reinterpret_cast<DIType*>(pointee_type), size_in_bits, align_in_bits, std::optional<unsigned>(), name);
return reinterpret_cast<ZigLLVMDIType*>(di_type);
}
@@ -625,7 +621,7 @@ ZigLLVMDIEnumerator *ZigLLVMCreateDebugEnumeratorOfArbitraryPrecision(ZigLLVMDIB
const char *name, unsigned NumWords, const uint64_t Words[], unsigned int bits, bool isUnsigned)
{
DIEnumerator *di_enumerator = reinterpret_cast<DIBuilder*>(dibuilder)->createEnumerator(name,
APSInt(APInt(bits, makeArrayRef(Words, NumWords)), isUnsigned));
APSInt(APInt(bits, ArrayRef(Words, NumWords)), isUnsigned));
return reinterpret_cast<ZigLLVMDIEnumerator*>(di_enumerator);
}
@@ -1493,6 +1489,7 @@ static_assert((Triple::ArchType)ZigLLVM_thumbeb == Triple::thumbeb, "");
static_assert((Triple::ArchType)ZigLLVM_x86 == Triple::x86, "");
static_assert((Triple::ArchType)ZigLLVM_x86_64 == Triple::x86_64, "");
static_assert((Triple::ArchType)ZigLLVM_xcore == Triple::xcore, "");
static_assert((Triple::ArchType)ZigLLVM_xtensa == Triple::xtensa, "");
static_assert((Triple::ArchType)ZigLLVM_nvptx == Triple::nvptx, "");
static_assert((Triple::ArchType)ZigLLVM_nvptx64 == Triple::nvptx64, "");
static_assert((Triple::ArchType)ZigLLVM_le32 == Triple::le32, "");
@@ -1578,6 +1575,9 @@ static_assert((Triple::EnvironmentType)ZigLLVM_GNUABIN32 == Triple::GNUABIN32, "
static_assert((Triple::EnvironmentType)ZigLLVM_GNUABI64 == Triple::GNUABI64, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUEABI == Triple::GNUEABI, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUEABIHF == Triple::GNUEABIHF, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUF32 == Triple::GNUF32, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUF64 == Triple::GNUF64, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUSF == Triple::GNUSF, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUX32 == Triple::GNUX32, "");
static_assert((Triple::EnvironmentType)ZigLLVM_GNUILP32 == Triple::GNUILP32, "");
static_assert((Triple::EnvironmentType)ZigLLVM_CODE16 == Triple::CODE16, "");

4
src/zig_llvm.h
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@@ -382,6 +382,7 @@ enum ZigLLVM_ArchType {
ZigLLVM_x86, // X86: i[3-9]86
ZigLLVM_x86_64, // X86-64: amd64, x86_64
ZigLLVM_xcore, // XCore: xcore
ZigLLVM_xtensa, // Tensilica: Xtensa
ZigLLVM_nvptx, // NVPTX: 32-bit
ZigLLVM_nvptx64, // NVPTX: 64-bit
ZigLLVM_le32, // le32: generic little-endian 32-bit CPU (PNaCl)
@@ -482,6 +483,9 @@ enum ZigLLVM_EnvironmentType {
ZigLLVM_GNUABI64,
ZigLLVM_GNUEABI,
ZigLLVM_GNUEABIHF,
ZigLLVM_GNUF32,
ZigLLVM_GNUF64,
ZigLLVM_GNUSF,
ZigLLVM_GNUX32,
ZigLLVM_GNUILP32,
ZigLLVM_CODE16,