x64: fix ptr_add
However, still missing is taking into account pointer alignment when performing arithmetic.
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@@ -2217,7 +2217,26 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs:
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// Now for step 2, we assing an MIR instruction
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const air_tags = self.air.instructions.items(.tag);
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switch (air_tags[inst]) {
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.add, .addwrap, .ptr_add => try self.genBinMathOpMir(.add, dst_ty, dst_mcv, src_mcv),
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.ptr_add => {
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// TODO clean this up
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// TODO take into account alignment
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const elem_size = dst_ty.elemType2().abiSize(self.target.*);
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const dst_reg = blk: {
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switch (dst_mcv) {
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.register => |reg| break :blk reg,
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else => {
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src_mcv.freezeIfRegister(&self.register_manager);
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defer src_mcv.freezeIfRegister(&self.register_manager);
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const reg = try self.copyToTmpRegister(dst_ty, dst_mcv);
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break :blk reg;
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},
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}
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};
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try self.genIMulOpMir(dst_ty, .{ .register = dst_reg }, .{ .immediate = elem_size });
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dst_mcv = MCValue{ .register = dst_reg };
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try self.genBinMathOpMir(.add, dst_ty, dst_mcv, src_mcv);
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},
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.add, .addwrap => try self.genBinMathOpMir(.add, dst_ty, dst_mcv, src_mcv),
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.bool_or, .bit_or => try self.genBinMathOpMir(.@"or", dst_ty, dst_mcv, src_mcv),
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.bool_and, .bit_and => try self.genBinMathOpMir(.@"and", dst_ty, dst_mcv, src_mcv),
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.sub, .subwrap => try self.genBinMathOpMir(.sub, dst_ty, dst_mcv, src_mcv),
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@@ -2244,8 +2263,11 @@ fn genBinMathOpMir(self: *Self, mir_tag: Mir.Inst.Tag, dst_ty: Type, dst_mcv: MC
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.none => unreachable,
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.undef => try self.genSetReg(dst_ty, dst_reg, .undef),
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.dead, .unreach => unreachable,
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.ptr_stack_offset => |off| {
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return self.genBinMathOpMir(mir_tag, dst_ty, dst_mcv, .{ .immediate = @bitCast(u32, off) });
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.ptr_stack_offset => {
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self.register_manager.freezeRegs(&.{dst_reg});
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defer self.register_manager.unfreezeRegs(&.{dst_reg});
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const reg = try self.copyToTmpRegister(dst_ty, src_mcv);
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return self.genBinMathOpMir(mir_tag, dst_ty, dst_mcv, .{ .register = reg });
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},
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.ptr_embedded_in_code => unreachable,
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.register => |src_reg| {
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@@ -106,6 +106,7 @@ fn fnWithAlignedStack() i32 {
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test "implicitly decreasing slice alignment" {
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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const a: u32 align(4) = 3;
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const b: u32 align(8) = 4;
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@@ -8,6 +8,7 @@ const expectEqual = testing.expectEqual;
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test "array to slice" {
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if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
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if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
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const a: u32 align(4) = 3;
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const b: u32 align(8) = 4;
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