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astgen: fix corpus mismatches (gap 20→-17)

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- endsWithNoReturn: add missing noreturn tags (RET_ERR_VALUE,
  RET_LOAD, COMPILE_ERROR, UNREACHABLE, TRAP,
  CHECK_COMPTIME_CONTROL_FLOW, SWITCH_CONTINUE)
- defer body: emit dbg_node + ensure_result (unusedResultExpr pattern)
- unwrap_optional: add emitDbgStmt before OPTIONAL_PAYLOAD_SAFE
- slice: add emitDbgStmt to SLICE_OPEN, SLICE, SLICE_SENTINEL
- switchExpr: remove erroneous save_err_ret_index (only in ErrUnion variant)

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
This commit is contained in:
Motiejus Jakštys
2026-02-12 17:58:52 +00:00
parent c525da4553
commit 79b19d4aa4
1 changed files with 31 additions and 6 deletions
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37
astgen.c
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@@ -7,7 +7,6 @@
#include "astgen.h"
#include "common.h"
#include <assert.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
@@ -1442,10 +1441,17 @@ static bool endsWithNoReturn(GenZir* gz) {
case ZIR_INST_BREAK_INLINE:
case ZIR_INST_CONDBR:
case ZIR_INST_CONDBR_INLINE:
case ZIR_INST_RET_IMPLICIT:
case ZIR_INST_COMPILE_ERROR:
case ZIR_INST_RET_NODE:
case ZIR_INST_RET_LOAD:
case ZIR_INST_RET_IMPLICIT:
case ZIR_INST_RET_ERR_VALUE:
case ZIR_INST_UNREACHABLE:
case ZIR_INST_REPEAT:
case ZIR_INST_REPEAT_INLINE:
case ZIR_INST_TRAP:
case ZIR_INST_CHECK_COMPTIME_CONTROL_FLOW:
case ZIR_INST_SWITCH_CONTINUE:
case ZIR_INST_SWITCH_BLOCK:
case ZIR_INST_SWITCH_BLOCK_REF:
case ZIR_INST_SWITCH_BLOCK_ERR_UNION:
@@ -3099,6 +3105,10 @@ static uint32_t exprRl(GenZir* gz, Scope* scope, ResultLoc rl, uint32_t node) {
// unwrap_optional (AstGen.zig:966-985).
case AST_NODE_UNWRAP_OPTIONAL: {
uint32_t lhs = expr(gz, scope, nd.lhs);
advanceSourceCursorToMainToken(ag, node);
uint32_t saved_line = ag->source_line - gz->decl_line;
uint32_t saved_col = ag->source_column;
emitDbgStmt(gz, saved_line, saved_col);
return rvalue(gz, rl,
addUnNode(gz, ZIR_INST_OPTIONAL_PAYLOAD_SAFE, lhs, node), node);
}
@@ -3134,7 +3144,11 @@ static uint32_t exprRl(GenZir* gz, Scope* scope, ResultLoc rl, uint32_t node) {
// slice (AstGen.zig:882-939).
case AST_NODE_SLICE_OPEN: {
uint32_t lhs = expr(gz, scope, nd.lhs);
advanceSourceCursorToMainToken(ag, node);
uint32_t saved_line = ag->source_line - gz->decl_line;
uint32_t saved_col = ag->source_column;
uint32_t start = expr(gz, scope, nd.rhs);
emitDbgStmt(gz, saved_line, saved_col);
return rvalue(gz, rl,
addPlNodeBin(gz, ZIR_INST_SLICE_START, node, lhs, start), node);
}
@@ -3142,10 +3156,14 @@ static uint32_t exprRl(GenZir* gz, Scope* scope, ResultLoc rl, uint32_t node) {
// Slice[rhs]: { start, end }
const Ast* stree = ag->tree;
uint32_t lhs = expr(gz, scope, nd.lhs);
advanceSourceCursorToMainToken(ag, node);
uint32_t saved_line = ag->source_line - gz->decl_line;
uint32_t saved_col = ag->source_column;
uint32_t start_node = stree->extra_data.arr[nd.rhs];
uint32_t end_node = stree->extra_data.arr[nd.rhs + 1];
uint32_t start_ref = expr(gz, scope, start_node);
uint32_t end_ref = expr(gz, scope, end_node);
emitDbgStmt(gz, saved_line, saved_col);
ensureExtraCapacity(ag, 3);
uint32_t payload_index = ag->extra_len;
ag->extra[ag->extra_len++] = lhs;
@@ -3161,12 +3179,16 @@ static uint32_t exprRl(GenZir* gz, Scope* scope, ResultLoc rl, uint32_t node) {
// SliceSentinel[rhs]: { start, end, sentinel }
const Ast* stree = ag->tree;
uint32_t lhs = expr(gz, scope, nd.lhs);
advanceSourceCursorToMainToken(ag, node);
uint32_t saved_line = ag->source_line - gz->decl_line;
uint32_t saved_col = ag->source_column;
uint32_t start_node = stree->extra_data.arr[nd.rhs];
uint32_t end_node = stree->extra_data.arr[nd.rhs + 1];
uint32_t sentinel_node = stree->extra_data.arr[nd.rhs + 2];
uint32_t start_ref = expr(gz, scope, start_node);
uint32_t end_ref = expr(gz, scope, end_node);
uint32_t sentinel_ref = expr(gz, scope, sentinel_node);
emitDbgStmt(gz, saved_line, saved_col);
ensureExtraCapacity(ag, 4);
uint32_t payload_index = ag->extra_len;
ag->extra[ag->extra_len++] = lhs;
@@ -4554,9 +4576,8 @@ static uint32_t switchExpr(
uint32_t body_node = cd.rhs;
GenZir case_scope = makeSubBlock(gz, scope);
// save_err_ret_index (AstGen.zig:7524-7525).
if (ag->fn_ret_ty != 0 && nodeMayAppendToErrorTrace(tree, cond_node))
addSaveErrRetIndex(&case_scope, ZIR_REF_NONE);
// Note: upstream regular switchExpr (AstGen.zig:7625) does NOT emit
// save_err_ret_index. Only switchExprErrUnion (AstGen.zig:7524) does.
// Use fullBodyExpr to process body inline (AstGen.zig:8009).
uint32_t result
@@ -5534,7 +5555,11 @@ static void blockExprStmts(GenZir* gz, Scope* scope,
} else {
expr_node = dnd.rhs;
}
expr(&defer_gen, &defer_gen.base, expr_node);
// unusedResultExpr pattern (AstGen.zig:3165, 2641-2646).
emitDbgNode(&defer_gen, expr_node);
uint32_t defer_result
= expr(&defer_gen, &defer_gen.base, expr_node);
addEnsureResult(&defer_gen, defer_result, expr_node);
// Add break_inline at end (AstGen.zig:3167).
addBreak(&defer_gen, ZIR_INST_BREAK_INLINE, 0, ZIR_REF_VOID_VALUE,