commit 80427796df5f8eb23ac7ca8ee03ac572b737757f (tree)
parent 53ec2a955eb02dc829af8610f17af42717d512fb
Author: Jacob Young <jacobly0@users.noreply.github.com>
Date: Sat, 18 Mar 2023 23:10:44 -0400
x86_64: implement @returnAddress and @frameAddress
Diffstat:
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig
@@ -4119,12 +4119,19 @@ fn airBreakpoint(self: *Self) !void {
}
fn airRetAddr(self: *Self, inst: Air.Inst.Index) !void {
- const result: MCValue = if (self.liveness.isUnused(inst)) .dead else return self.fail("TODO implement airRetAddr for x86_64", .{});
+ const result: MCValue = if (self.liveness.isUnused(inst))
+ .dead
+ else
+ .{ .stack_offset = -@as(i32, @divExact(self.target.cpu.arch.ptrBitWidth(), 8)) };
return self.finishAir(inst, result, .{ .none, .none, .none });
}
fn airFrameAddress(self: *Self, inst: Air.Inst.Index) !void {
- const result: MCValue = if (self.liveness.isUnused(inst)) .dead else return self.fail("TODO implement airFrameAddress for x86_64", .{});
+ const result = if (self.liveness.isUnused(inst)) .dead else result: {
+ const dst_mcv = try self.allocRegOrMem(inst, true);
+ try self.genBinOpMir(.mov, Type.usize, dst_mcv, .{ .register = .rbp });
+ break :result dst_mcv;
+ };
return self.finishAir(inst, result, .{ .none, .none, .none });
}
diff --git a/test/behavior/return_address.zig b/test/behavior/return_address.zig
@@ -7,7 +7,6 @@ fn retAddr() usize {
test "return address" {
if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest; // TODO
- if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO