commit 8259d8d63145260bff4faf1d4d48b28d4061dc5a (tree)
parent e95132476dfd26b28b55f7656f03dd1ec338b509
Author: David Rubin <david@vortan.dev>
Date: Tue, 17 Feb 2026 13:58:26 -0800
minimal
Diffstat:
2 files changed, 157 insertions(+), 1 deletion(-)
diff --git a/lib/std/Io/Uring.zig b/lib/std/Io/Uring.zig
@@ -872,6 +872,11 @@ pub fn init(ev: *Evented, backing_allocator: Allocator, options: InitOptions) !v
.fp = @intFromPtr(ev),
.pc = @intFromPtr(&mainIdleEntry),
},
+ .riscv64 => .{
+ .sp = @intFromPtr(allocated_slice[idle_stack_end_offset..].ptr),
+ .fp = @intFromPtr(ev),
+ .pc = @intFromPtr(&mainIdleEntry),
+ },
.x86_64 => .{
.rsp = @intFromPtr(allocated_slice[idle_stack_end_offset..].ptr),
.rbp = @intFromPtr(ev),
@@ -1109,6 +1114,13 @@ fn mainIdleEntry() callconv(.naked) void {
:
: [mainIdle] "X" (&mainIdle),
),
+ .riscv64 => asm volatile (
+ \\ mv a0, fp
+ \\ mv fp, zero
+ \\ tail %[mainIdle]@plt
+ :
+ : [mainIdle] "X" (&mainIdle),
+ ),
.x86_64 => asm volatile (
\\ movq %%rbp, %%rdi
\\ xor %%ebp, %%ebp
@@ -1383,6 +1395,12 @@ const AsyncClosure = struct {
:
: [call] "X" (&call),
),
+ .riscv64 => asm volatile (
+ \\ mv a0, sp
+ \\ tail %[call]@plt
+ :
+ : [call] "X" (&call),
+ ),
.x86_64 => asm volatile (
\\ leaq 8(%%rsp), %%rdi
\\ jmp %[call:P]
@@ -1448,6 +1466,11 @@ fn concurrent(
.fp = 0,
.pc = @intFromPtr(&AsyncClosure.entry),
},
+ .riscv64 => .{
+ .sp = @intFromPtr(closure),
+ .fp = 0,
+ .pc = @intFromPtr(&AsyncClosure.entry),
+ },
.x86_64 => .{
.rsp = @intFromPtr(closure) - 8,
.rbp = 0,
@@ -1737,6 +1760,12 @@ const Group = struct {
:
: [call] "X" (&call),
),
+ .riscv64 => asm volatile (
+ \\ mv a0, sp
+ \\ tail %[call]@plt
+ :
+ : [call] "X" (&call),
+ ),
.x86_64 => asm volatile (
\\ leaq 8(%%rsp), %%rdi
\\ jmp %[call:P]
@@ -1821,6 +1850,11 @@ fn groupConcurrent(
.fp = 0,
.pc = @intFromPtr(&Group.AsyncClosure.entry),
},
+ .riscv64 => .{
+ .sp = @intFromPtr(closure),
+ .fp = 0,
+ .pc = @intFromPtr(&Group.AsyncClosure.entry),
+ },
.x86_64 => .{
.rsp = @intFromPtr(closure) - 8,
.rbp = 0,
diff --git a/lib/std/Io/fiber.zig b/lib/std/Io/fiber.zig
@@ -1,5 +1,5 @@
pub const supported = switch (builtin.cpu.arch) {
- .aarch64, .x86_64 => true,
+ .aarch64, .riscv64, .x86_64 => true,
else => false,
};
@@ -10,6 +10,11 @@ pub const Context = switch (builtin.cpu.arch) {
fp: u64,
pc: u64,
},
+ .riscv64 => extern struct {
+ sp: u64,
+ fp: u64,
+ pc: u64,
+ },
.x86_64 => extern struct {
rsp: u64,
rbp: u64,
@@ -119,6 +124,123 @@ pub inline fn contextSwitch(s: *const Switch) *const Switch {
.ffr = true,
.memory = true,
}),
+ .riscv64 => asm volatile (
+ \\ ld a0, 0(a1)
+ \\ ld a2, 8(a1)
+ \\ lla a3, 0f
+ \\ sd sp, 0(a0)
+ \\ sd fp, 8(a0)
+ \\ sd a3, 16(a0)
+ \\ ld sp, 0(a2)
+ \\ ld fp, 8(a2)
+ \\ ld a3, 16(a2)
+ \\ jr a3
+ \\0:
+ : [received_message] "={a1}" (-> *const Switch),
+ : [message_to_send] "{a1}" (s),
+ : .{
+ .x1 = true,
+ .x3 = true,
+ .x4 = true,
+ .x5 = true,
+ .x6 = true,
+ .x7 = true,
+ .x9 = true,
+ .x10 = true,
+ .x11 = true,
+ .x12 = true,
+ .x13 = true,
+ .x14 = true,
+ .x15 = true,
+ .x16 = true,
+ .x17 = true,
+ .x18 = true,
+ .x19 = true,
+ .x20 = true,
+ .x21 = true,
+ .x22 = true,
+ .x23 = true,
+ .x24 = true,
+ .x25 = true,
+ .x26 = true,
+ .x27 = true,
+ .x28 = true,
+ .x29 = true,
+ .x30 = true,
+ .x31 = true,
+ .f0 = true,
+ .f1 = true,
+ .f2 = true,
+ .f3 = true,
+ .f4 = true,
+ .f5 = true,
+ .f6 = true,
+ .f7 = true,
+ .f8 = true,
+ .f9 = true,
+ .f10 = true,
+ .f11 = true,
+ .f12 = true,
+ .f13 = true,
+ .f14 = true,
+ .f15 = true,
+ .f16 = true,
+ .f17 = true,
+ .f18 = true,
+ .f19 = true,
+ .f20 = true,
+ .f21 = true,
+ .f22 = true,
+ .f23 = true,
+ .f24 = true,
+ .f25 = true,
+ .f26 = true,
+ .f27 = true,
+ .f28 = true,
+ .f29 = true,
+ .f30 = true,
+ .f31 = true,
+ .v0 = true,
+ .v1 = true,
+ .v2 = true,
+ .v3 = true,
+ .v4 = true,
+ .v5 = true,
+ .v6 = true,
+ .v7 = true,
+ .v8 = true,
+ .v9 = true,
+ .v10 = true,
+ .v11 = true,
+ .v12 = true,
+ .v13 = true,
+ .v14 = true,
+ .v15 = true,
+ .v16 = true,
+ .v17 = true,
+ .v18 = true,
+ .v19 = true,
+ .v20 = true,
+ .v21 = true,
+ .v22 = true,
+ .v23 = true,
+ .v24 = true,
+ .v25 = true,
+ .v26 = true,
+ .v27 = true,
+ .v28 = true,
+ .v29 = true,
+ .v30 = true,
+ .v31 = true,
+ .vtype = true,
+ .vl = true,
+ .vxsat = true,
+ .vxrm = true,
+ .vcsr = true,
+ .fflags = true,
+ .frm = true,
+ .memory = true,
+ }),
.x86_64 => asm volatile (
\\ movq 0(%%rsi), %%rax
\\ movq 8(%%rsi), %%rcx
