zig

commit 8b70abfcc66e375d71acf1e753d3589e38ba1a3d (tree)
parent 4d50e52c37cad45bd3d8fd520359cdaee70aaf1f
Author: Koakuma <koachan@protonmail.com>
Date:   Wed,  1 Jun 2022 19:32:14 +0700

stage2: sparc64: Fix & optimize 64-bit truncRegister

Diffstat:
M
src/arch/sparc64/CodeGen.zig
 | 
4
+++-

1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/arch/sparc64/CodeGen.zig b/src/arch/sparc64/CodeGen.zig
@@ -3569,11 +3569,13 @@ fn truncRegister(
             });
         },
         64 => {
+            if (dest_reg == operand_reg)
+                return; // Copy register to itself; nothing to do.
             _ = try self.addInst(.{
                 .tag = .mov,
                 .data = .{
                     .arithmetic_2op = .{
-                        .is_imm = true,
+                        .is_imm = false,
                         .rs1 = dest_reg,
                         .rs2_or_imm = .{ .rs2 = operand_reg },
                     },