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stage2 ARM: Add simple tests for conditional branching

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This commit is contained in:
joachimschmidt557
2020-12-30 19:54:34 +01:00
parent c52ca0b178
commit a2ab2fb9b0
1 changed files with 62 additions and 0 deletions
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62
test/stage2/arm.zig
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@@ -282,4 +282,66 @@ pub fn addCases(ctx: *TestContext) !void {
"123456",
);
}
{
var case = ctx.exe("if statements", linux_arm);
// Simple if statement in assert
case.addCompareOutput(
\\export fn _start() noreturn {
\\ var x: u32 = 123;
\\ var y: u32 = 42;
\\ assert(x > y);
\\ exit();
\\}
\\
\\fn assert(ok: bool) void {
\\ if (!ok) unreachable;
\\}
\\
\\fn exit() noreturn {
\\ asm volatile ("svc #0"
\\ :
\\ : [number] "{r7}" (1),
\\ [arg1] "{r0}" (0)
\\ : "memory"
\\ );
\\ unreachable;
\\}
,
"",
);
}
{
var case = ctx.exe("while loops", linux_arm);
// Simple while loop with assert
case.addCompareOutput(
\\export fn _start() noreturn {
\\ var x: u32 = 2020;
\\ var i: u32 = 0;
\\ while (x > 0) {
\\ x -= 2;
\\ i += 1;
\\ }
\\ assert(i == 1010);
\\ exit();
\\}
\\
\\fn assert(ok: bool) void {
\\ if (!ok) unreachable;
\\}
\\
\\fn exit() noreturn {
\\ asm volatile ("svc #0"
\\ :
\\ : [number] "{r7}" (1),
\\ [arg1] "{r0}" (0)
\\ : "memory"
\\ );
\\ unreachable;
\\}
,
"",
);
}
}