zig

commit a36dab2f90020c5544fddf68520c2057edc2ec00 (tree)
parent b2732645b7ffc08d9227bd5d82e1de1a6fbedb8e
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Tue, 14 Oct 2025 09:41:20 +0200

std.debug.Dwarf: add SPARC register number mappings

Diffstat:
M
lib/std/debug/Dwarf.zig
 | 
3
+++

1 file changed, 3 insertions(+), 0 deletions(-)
diff --git a/lib/std/debug/Dwarf.zig b/lib/std/debug/Dwarf.zig
@@ -1437,6 +1437,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,
         .riscv32, .riscv32be, .riscv64, .riscv64be => 65,
         .s390x => 65,
+        .sparc, .sparc64 => 32,
         .x86 => 8,
         .x86_64 => 16,
         else => null,
@@ -1453,6 +1454,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
         .riscv32, .riscv32be, .riscv64, .riscv64be => 8,
         .s390x => 11,
+        .sparc, .sparc64 => 30,
         .x86 => 5,
         .x86_64 => 6,
         else => unreachable,
@@ -1469,6 +1471,7 @@ pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
         .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
         .riscv32, .riscv32be, .riscv64, .riscv64be => 2,
         .s390x => 15,
+        .sparc, .sparc64 => 14,
         .x86 => 4,
         .x86_64 => 7,
         else => unreachable,