zig

commit af084e537adbf571d3d1f69ef5ee3de7abd27ccd (tree)
parent c2fa961b63cc32d9cecb8f33db465667c093f961
Author: Andrew Kelley <andrew@ziglang.org>
Date:   Tue, 15 Jul 2025 23:43:34 -0700

add lr register to mips

Diffstat:
M
lib/std/builtin/assembly.zig
 | 
2
++

1 file changed, 2 insertions(+), 0 deletions(-)
diff --git a/lib/std/builtin/assembly.zig b/lib/std/builtin/assembly.zig
@@ -2062,6 +2062,8 @@ pub const Clobbers = switch (@import("builtin").cpu.arch) {
         /// addresses other than those derived from input pointer provenance.
         memory: bool = false,
 
+        lr: bool = false,
+
         hi: bool = false,
         lo: bool = false,
         ac0: bool = false,