Revert "stage2: add support for zig cc assembler -mcpu option"
This reverts commit afb9f695b1.
I don't think this was ever actually verified to fix the thing it
purported to, and it started causing warnings for unused command line
parameters.
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@@ -2943,29 +2943,25 @@ pub fn addCCArgs(
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try argv.append("-fPIC");
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}
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},
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.shared_library, .ll, .bc, .unknown, .static_library, .object, .zig => {},
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.assembly => {
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// Argh, why doesn't the assembler accept the list of CPU features?!
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// I don't see a way to do this other than hard coding everything.
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switch (target.cpu.arch) {
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.riscv32, .riscv64 => {
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if (std.Target.riscv.featureSetHas(target.cpu.features, .relax)) {
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try argv.append("-mrelax");
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} else {
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try argv.append("-mno-relax");
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}
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},
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else => {
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// TODO
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},
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}
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if (target.cpu.model.llvm_name) |ln|
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try argv.append(try std.fmt.allocPrint(arena, "-mcpu={s}", .{ln}));
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},
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.shared_library, .assembly, .ll, .bc, .unknown, .static_library, .object, .zig => {},
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}
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if (out_dep_path) |p| {
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try argv.appendSlice(&[_][]const u8{ "-MD", "-MV", "-MF", p });
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}
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// Argh, why doesn't the assembler accept the list of CPU features?!
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// I don't see a way to do this other than hard coding everything.
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switch (target.cpu.arch) {
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.riscv32, .riscv64 => {
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if (std.Target.riscv.featureSetHas(target.cpu.features, .relax)) {
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try argv.append("-mrelax");
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} else {
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try argv.append("-mno-relax");
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}
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},
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else => {
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// TODO
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},
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}
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if (target_util.clangMightShellOutForAssembly(target)) {
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try argv.append("-integrated-as");
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