zig

commit c2beaba85a87b5985fe9f1676ad2bc4888dd6c1a (tree)
parent 221f1d898c39e9ea25f1d7fc9642bfbb3c97e894
Author: joachimschmidt557 <joachim.schmidt557@outlook.com>
Date:   Mon,  8 Feb 2021 22:29:41 +0100

stage2 ARM: fix callee_preserved_regs

Previously, the registers included r0, r1, r2, r3 which are not
included in the callee saved registers according to the Procedure Call
Standard for the ARM Architecture.

Diffstat:
M
src/codegen/arm.zig
 | 
2
+-

1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/codegen/arm.zig b/src/codegen/arm.zig
@@ -186,7 +186,7 @@ pub const Psr = enum {
     spsr,
 };
 
-pub const callee_preserved_regs = [_]Register{ .r0, .r1, .r2, .r3, .r4, .r5, .r6, .r7, .r8, .r10 };
+pub const callee_preserved_regs = [_]Register{ .r4, .r5, .r6, .r7, .r8, .r10 };
 pub const c_abi_int_param_regs = [_]Register{ .r0, .r1, .r2, .r3 };
 pub const c_abi_int_return_regs = [_]Register{ .r0, .r1 };