commit e9efed9ed117c1b6f5fc138999d82e0dbb1f13bf (tree)
parent 7e1cba73fc5dce195af2c5cc6a2a1427710ed3ed
Author: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 1 May 2024 18:57:09 -0700
LLVM: zeroext/signext does happen on macos
Fixes a regression introduced in 3ce7fee9dd8bbb6f56e47758a9a8ada028400c71.
Diffstat:
1 file changed, 23 insertions(+), 17 deletions(-)
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
@@ -11577,29 +11577,35 @@ fn ccAbiPromoteInt(
.Int, .Enum, .ErrorSet => ty.intInfo(mod),
else => return null,
};
- return switch (target.cpu.arch) {
- .riscv64 => switch (int_info.bits) {
+ return switch (target.os.tag) {
+ .macos => switch (int_info.bits) {
0...16 => int_info.signedness,
- 32 => .signed, // LLVM always signextends 32 bit ints, unsure if bug.
- 17...31, 33...63 => int_info.signedness,
else => null,
},
+ else => switch (target.cpu.arch) {
+ .riscv64 => switch (int_info.bits) {
+ 0...16 => int_info.signedness,
+ 32 => .signed, // LLVM always signextends 32 bit ints, unsure if bug.
+ 17...31, 33...63 => int_info.signedness,
+ else => null,
+ },
- .sparc64,
- .powerpc64,
- .powerpc64le,
- => switch (int_info.bits) {
- 0...63 => int_info.signedness,
- else => null,
- },
+ .sparc64,
+ .powerpc64,
+ .powerpc64le,
+ => switch (int_info.bits) {
+ 0...63 => int_info.signedness,
+ else => null,
+ },
- .aarch64,
- .aarch64_be,
- => null,
+ .aarch64,
+ .aarch64_be,
+ => null,
- else => switch (int_info.bits) {
- 0...16 => int_info.signedness,
- else => null,
+ else => switch (int_info.bits) {
+ 0...16 => int_info.signedness,
+ else => null,
+ },
},
};
}