commit fa445d86a110f1171b75824fe5ec139089fa4733 (tree)
parent c80aa9f71960ed90787033293fbc4c6ccfe0fba8
Author: Alex Rønne Petersen <alex@alexrp.com>
Date: Sun, 3 Aug 2025 11:05:04 +0200
ci: target baseline instead of spacemit_x60 on riscv64-linux
Doesn't seem to make much of a difference anyway, and LLVM 20 appears to still
have some miscompilations with vector and bitmanip extensions enabled.
Diffstat:
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/ci/riscv64-linux-debug.sh b/ci/riscv64-linux-debug.sh
@@ -7,7 +7,7 @@ set -e
ARCH="$(uname -m)"
TARGET="$ARCH-linux-musl"
-MCPU="spacemit_x60"
+MCPU="baseline"
CACHE_BASENAME="zig+llvm+lld+clang-riscv64-linux-musl-0.15.0-dev.929+31e46be74"
PREFIX="$HOME/deps/$CACHE_BASENAME"
ZIG="$PREFIX/bin/zig"
diff --git a/ci/riscv64-linux-release.sh b/ci/riscv64-linux-release.sh
@@ -7,7 +7,7 @@ set -e
ARCH="$(uname -m)"
TARGET="$ARCH-linux-musl"
-MCPU="spacemit_x60"
+MCPU="baseline"
CACHE_BASENAME="zig+llvm+lld+clang-riscv64-linux-musl-0.15.0-dev.929+31e46be74"
PREFIX="$HOME/deps/$CACHE_BASENAME"
ZIG="$PREFIX/bin/zig"