joachimschmidt557
f2a3368891
stage2 ARM: Add spill registers test
2021-05-09 08:48:58 +02:00
joachimschmidt557
4fe575f47b
stage2 ARM: Add fibonacci test
2021-04-11 10:19:36 +02:00
joachimschmidt557
1b657e6e41
stage2 codegen: Make sure function return value is in a callee
...
preserved register
2021-03-31 23:27:50 +02:00
joachimschmidt557
278bd60732
stage2 ARM: Add tests for basic integer multiplication
2021-03-02 00:34:41 +01:00
Andrew Kelley
30a824cb9e
astgen: eliminate rlWrapPtr and all its callsites
...
The following AST avoids unnecessary derefs now:
* error set decl
* field access
* array access
* for loops: replace ensure_indexable and deref on the len_ptr with a
special purpose ZIR instruction called indexable_ptr_len.
Added an error note when for loop operand is the wrong type.
I also accidentally implemented `@field`.
2021-01-19 00:38:53 -07:00
joachimschmidt557
a2ab2fb9b0
stage2 ARM: Add simple tests for conditional branching
2021-01-01 12:22:17 +01:00
joachimschmidt557
45a88be573
stage2 ARM: add test cases for binary bitwise operations
2020-12-21 19:24:23 +01:00
joachimschmidt557
ceebcb2b4d
stage2 ARM: add test case for addition
2020-11-28 23:26:17 +01:00
joachimschmidt557
fb58fb2d8d
stage2 ARM: add testcases for non-leaf fns, parameters, return values
2020-10-03 12:52:04 +02:00
