Commit Graph

95 Commits

Author SHA1 Message Date
Andrew Kelley
c9cc09a3bf Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * lib/std/os/linux.zig
 * lib/std/os/windows/bits.zig
 * src/Module.zig
 * src/Sema.zig
 * test/stage2/test.zig

Mainly I wanted Jakub's new macOS code for respecting stack size, since
we now depend on it for debug builds able to pass one of the test cases
for recursive comptime function calls with `@setEvalBranchQuota`.

The conflicts were all trivial.
2021-05-12 16:41:20 -07:00
Andrew Kelley
b88d381dec Merge pull request #8474 from gracefuu/grace/encode-instruction
stage2 x86_64: encoding helpers, fix bugs
2021-05-09 01:36:51 -04:00
Andrew Kelley
7dd33d4316 stage2: fix compile errors in test harness 2021-05-06 17:48:38 -07:00
Andrew Kelley
5d7f2697de stage2: add zig changelist debug command
and implement the first pass at mechanism to map old ZIR to new ZIR.
2021-05-05 13:16:14 -07:00
Andrew Kelley
1f0fd64302 stage2: test coverage for inline asm return type not type 2021-05-04 14:23:53 -07:00
jacob gw
2354cbafdb stage2: implement #8364 2021-04-28 19:54:04 -04:00
Andrew Kelley
df24ce52b1 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
In particular I wanted to take advantage of the new hex float parsing
code.
2021-04-28 14:57:38 -07:00
joachimschmidt557
bc06e19828 stage2 riscv64: cleanup code and add tests 2021-04-28 07:20:45 +02:00
gracefu
c4b83ea021 stage2 x86_64: implement integer mul
This was also an experiment to see if it were easier to implement a new
feature when using the instruction encoder.

Verdict: It's not that much easier, but I think it's certainly much more
readable, because the description of the Instruction annotates what each
field means. Right now, precise knowledge of x86_64 instructions is
still required because things like when to set the 64-bit flag, how to
read x86_64 instruction references, etc. are still not automatically
done for you.

In the future, this interface might make it sligtly easier to write an
assembler for x86_64, by abstracting the bit-fiddling aspects of
instruction encoding.
2021-04-16 15:21:17 +08:00
gracefu
5bd464e386 stage2 x86_64: use abi size to determine 64-bit operation
From my very cursory reading, it seems that the register manager doesn't
distinguish between registers that are physically the same but have
different sizes.

In that case, this means that during codegen, we can't rely on
`reg.size()` when determining the width of the operations we have to
perform. Instead, we must use some form of `ty.abiSize(self.target.*)`
to determine the size of the type we're operating with. If this size is
64 bits, then we should enable 64-bit operation.

This fixed a bug in the codegen for spilling instructions, which was
overwriting the previous stack entry with zeroes. See the modified test
case in this commit.
2021-04-16 15:21:17 +08:00
Andrew Kelley
f458192e56 stage2: entry point via std lib and proper updated file detection
Instead of Module setting up the root_scope with the root source file,
instead, Module relies on the package table graph being set up properly,
and inside `update()`, it does the equivalent of `_ = @import("std");`.
This, in term, imports start.zig, which has the logic to call main (or
not). `Module` no longer has `root_scope` - the root source file is no
longer special, it's just in the package table mapped to "root".

I also went ahead and implemented proper detection of updated files.
mtime, inode, size, and source hash are kept in `Scope.File`.
During an update, iterate over `import_table` and stat each file to find
out which ones are updated.

The source hash is redundant with the source hash used by the struct
decl that corresponds to the file, so it should be removed in a future
commit before merging the branch.

 * AstGen: add "previously declared here" notes for variables shadowing
   decls.
 * Parse imports as structs. Module now calls `AstGen.structDeclInner`,
   which is called by `AstGen.containerDecl`.
   - `importFile` is a bit kludgy with how it handles the top level Decl
     that kinda gets merged into the struct decl at the end of the
     function. Be on the look out for bugs related to that as well as
     possibly cleaner ways to implement this.
 * Module: factor out lookupDeclName into lookupIdentifier and lookupNa
 * Rename `Scope.Container` to `Scope.Namespace`.
 * Delete some dead code.

This branch won't work until `usingnamespace` is implemented because it
relies on `@import("builtin").OutputMode` and `OutputMode` comes from a
`usingnamespace`.
2021-04-15 19:06:39 -07:00
jacob gw
afe5862111 stage2: add error for private decls accessed from other files 2021-04-09 10:05:15 -07:00
Andrew Kelley
91e1414b50 stage2: implement array access to a global array 2021-04-08 21:56:42 -07:00
Andrew Kelley
61b868f9a5 stage2: simplify Decl src_node field
Also fix "previous definition here" error notes to be correct.
2021-04-08 20:37:19 -07:00
Andrew Kelley
8f469c1127 stage2: fix error sets 2021-03-28 19:40:21 -07:00
Andrew Kelley
68f4eb0f67 stage2: fully implement Type.eql for pointers
Also fixed abiAlignment - for pointers it was returning the abi
alignment inside the type, rather than of the pointer itself. There is
now `ptrAlignment` for getting the alignment inside the type of
pointers.
2021-03-27 23:55:19 -07:00
Andrew Kelley
1f5617ac07 stage2: implement bitwise expr and error literals 2021-03-26 23:46:37 -07:00
Andrew Kelley
da731e18c9 stage2: implement source location: .node_offset_var_decl_ty 2021-03-26 18:35:15 -07:00
Andrew Kelley
a72bfd00cf astgen: fix continue expressions 2021-03-26 18:26:39 -07:00
Andrew Kelley
b2deaf8027 stage2: improve source locations of Decl access
* zir.Code: introduce a decls array. This is so that `decl_val` and
   `decl_ref` instructions can refer to a Decl with a u32 and therefore
   they can also store a source location. This is needed for proper
   compile error reporting.
 * astgen uses a hash map to avoid redundantly adding a Decl to the
   decls array.
 * fixed reporting "instruction illegal outside function body" instead
   of the desired message "unable to resolve comptime value".
 * astgen skips emitting dbg_stmt instructions in comptime scopes.
 * astgen has some logic to avoid adding unnecessary type coercion
   instructions for common values.
2021-03-25 23:45:17 -07:00
Andrew Kelley
4bfcd105ef stage2: fix @compileLog. 2021-03-25 20:11:23 -07:00
Andrew Kelley
4fd3a2e8e8 astgen: fix var decl source locations 2021-03-25 19:39:30 -07:00
Andrew Kelley
b9c5a1fdf5 astgen: fix for loop expressions
also rename the ZIR instruction `deref_node` to `load`.
2021-03-25 19:25:26 -07:00
Andrew Kelley
399bb2e154 astgen: fix array access 2021-03-25 13:03:54 -07:00
Andrew Kelley
31023de6c4 stage2: implement inline while
Introduce "inline" variants of ZIR tags:
 * block => block_inline
 * repeat => repeat_inline
 * break => break_inline
 * condbr => condbr_inline

The inline variants perform control flow at compile-time, and they
utilize the return value of `Sema.analyzeBody`.

`analyzeBody` now returns an Index, not a Ref, which is the ZIR index of
a break instruction. This effectively communicates both the intended
break target block as well as the operand, allowing parent blocks to
find out whether they, in turn, should return the break instruction up the
call stack, or accept the operand as the block's result and continue
analyzing instructions in the block.

Additionally:
 * removed the deprecated ZIR tag `block_comptime`.
 * removed `break_void_node` so that all break instructions use the same Data.
 * zir.Code: remove the `root_start` and `root_len` fields. There is now
   implied to be a block at index 0 for the root body. This is so that
   `break_inline` has something to point at and we no longer need the
   special instruction `break_flat`.
 * implement source location byteOffset() for .node_offset_if_cond
   .node_offset_for_cond is probably redundant and can be deleted.

We don't have `comptime var` supported yet, so this commit adds a test
that at least makes sure the condition is required to be comptime known
for `inline while`.
2021-03-25 00:55:36 -07:00
Andrew Kelley
12d18a36e5 stage2: enable passing tests 2021-03-24 20:58:38 -07:00
Andrew Kelley
a1afe69395 stage2: comment out failing test cases; implement more things
* comment out the failing stage2 test cases
   (so that we can uncomment the ones that are newly passing with
   further commits)
 * Sema: implement negate, negatewrap
 * astgen: implement field access, multiline string literals, and
   character literals
 * Module: when resolving an AST node into a byte offset, use the
   main_tokens array, not the firstToken function
2021-03-23 23:13:01 -07:00
Andrew Kelley
bf7c3e9355 astgen: fixups regarding var decls and rl_ptr 2021-03-23 16:47:41 -07:00
g-w1
8b100792eb stage2: error set merging with tests
I had to come up with creative tests because we don't have error set type equality yet.
2021-03-02 23:53:05 -07:00
g-w1
153c97ac9e improve stage2 to allow catch at comptime:
* add error_union value tag.
* add analyzeIsErr
* add Value.isError
* add TZIR wrap_errunion_payload and wrap_errunion_err for
  wrapping from T -> E!T and E -> E!T
* add anlyzeInstUnwrapErrCode and analyzeInstUnwrapErr
* add analyzeInstEnsureErrPayloadVoid:
* add wrapErrorUnion
* add comptime error comparison for tests
* tests!
2021-02-25 16:41:16 -08:00
Andrew Kelley
8e6c2b7a47 Merge remote-tracking branch 'origin/master' into ast-memory-layout 2021-02-24 15:08:23 -07:00
Andrew Kelley
ed1e5cb3f6 stage2: fix a couple off by one errors
All stage2 tests are passing again in this branch.

Remaining checklist for this branch:
 * get the rest of the zig fmt test cases passing
   - re-enable the translate-c test case that is blocking on this
 * implement the 2 `@panic(TODO)`'s in parse.zig
 * use fn_proto not fn_decl for extern function declarations
2021-02-19 21:47:11 -07:00
Tadeo Kondrak
9270aae071 stage2: fix zero-sized function parameters (#7998) 2021-02-12 15:40:44 -05:00
Tadeo Kondrak
5dfe0e7e8f Convert inline fn to callconv(.Inline) everywhere 2021-02-10 20:06:12 -07:00
Andrew Kelley
0f5eda973e stage2: delete astgen for switch expressions
The astgen for switch expressions did not respect the ZIR rules of only
referencing instructions that are in scope:

  %14 = block_comptime_flat({
    %15 = block_comptime_flat({
      %16 = const(TypedValue{ .ty = comptime_int, .val = 1})
    })
    %17 = block_comptime_flat({
      %18 = const(TypedValue{ .ty = comptime_int, .val = 2})
    })
  })
  %19 = block({
    %20 = ref(%5)
    %21 = deref(%20)
    %22 = switchbr(%20, [%15, %17], {
      %15 => {
        %23 = const(TypedValue{ .ty = comptime_int, .val = 1})
        %24 = store(%10, %23)
        %25 = const(TypedValue{ .ty = void, .val = {}})
        %26 = break("label_19", %25)
      },
      %17 => {
        %27 = const(TypedValue{ .ty = comptime_int, .val = 2})
        %28 = store(%10, %27)
        %29 = const(TypedValue{ .ty = void, .val = {}})
        %30 = break("label_19", %29)
      }
    }, {
      %31 = unreachable_safe()
    }, special_prong=else)
  })

In this snippet you can see that the comptime expr referenced %15 and
%17 which are not in scope. There also was no test coverage for runtime
switch expressions.

Switch expressions will have to be re-introduced to follow these rules
and with some test coverage. There is some usable code being deleted in
this commit; it will be useful to reference when re-implementing switch
later.

A few more improvements to do while we're at it:
 * only use .ref result loc on switch target if any prongs obtain the
   payload with |*syntax|
   - this improvement should be done to if, while, and for as well.
   - this will remove the needless ref/deref instructions above
 * remove switchbr and add switch_block, which is both a block and a
   switch branch.
   - similarly we should remove loop and add loop_block.

This commit introduces a "force_comptime" flag into the GenZIR
scope. The main purpose of this will be to choose the "comptime"
variants of certain key zir instructions, such as function calls and
branches. We will be moving away from using the block_comptime_flat
ZIR instruction, and eventually deleting it.

This commit also contains miscellaneous fixes to this branch that bring
it to the state of passing all the tests.
2021-01-31 21:09:22 -07:00
Jakub Konka
0e56d4cc02 stage2: converge x86_64 and aarch64 tests on macOS 2021-01-19 22:39:49 +01:00
Andrew Kelley
287f640cc9 stage2: ELF: fix crash when only 1 function and it gets updated 2021-01-19 14:08:43 -07:00
Andrew Kelley
30a824cb9e astgen: eliminate rlWrapPtr and all its callsites
The following AST avoids unnecessary derefs now:
 * error set decl
 * field access
 * array access
 * for loops: replace ensure_indexable and deref on the len_ptr with a
   special purpose ZIR instruction called indexable_ptr_len.

Added an error note when for loop operand is the wrong type.

I also accidentally implemented `@field`.
2021-01-19 00:38:53 -07:00
g-w1
3c2a9220ed stage2: fix orelse at comptime
There was just some untested code that did not work. .isnull -> .isnonnull
and I had to add a .ref resultloc to make types match up.
2021-01-18 19:29:18 -07:00
Andrew Kelley
46dd058d59 Merge pull request #7797 from Luukdegram/wasm-refactor
stage2: wasm - Refactor codegen for wasm similar to other backends
2021-01-18 12:35:52 -08:00
Jakub Konka
3562edf137 macho: improve x86_64 tests; clean fixups on error
When codegen ends in failure, we need to manually clean up any fixups
that may have been gathered during that `codegen.generateSymbol` call.
Otherwise, we will end trapping.
2021-01-17 16:01:16 +01:00
Andrew Kelley
8deb21c58a stage2: add compile error for label redefinition
Also fix incorrectly destroying notes.

This work is based on Vexu's patch in #7555.
2021-01-17 00:15:25 -07:00
Andrew Kelley
8c9ac4db97 stage2: implement error notes and regress -femit-zir
* Implement error notes
   - note: other symbol exported here
   - note: previous else prong is here
   - note: previous '_' prong is here
 * Add Compilation.CObject.ErrorMsg. This object properly converts to
   AllErrors.Message when the time comes.
 * Add Compilation.CObject.failure_retryable. Properly handles
   out-of-memory and other transient failures.
 * Introduce Module.SrcLoc which has not only a byte offset but also
   references the file which the byte offset applies to.
 * Scope.Block now contains both a pointer to the "owner" Decl and the
   "source" Decl. As an example, during inline function call, the
   "owner" will be the Decl of the caller and the "source" will be the
   Decl of the callee.
 * Module.ErrorMsg now sports a `file_scope` field so that notes can
   refer to source locations in a file other than the parent error
   message.
 * Some instances where a `*Scope` was stored, now store a
   `*Scope.Container`.
 * Some methods in the `Scope` namespace were moved to the more specific
   type, since there was only an implementation for one particular tag.
   - `removeDecl` moved to `Scope.Container`
   - `destroy` moved to `Scope.File`
 * Two kinds of Scope deleted:
   - zir_module
   - decl
 * astgen: properly use DeclVal / DeclRef. DeclVal was incorrectly
   changed to be a reference; this commit fixes it. Fewer ZIR
   instructions processed as a result.
   - declval_in_module is renamed to declval
   - previous declval ZIR instruction is deleted; it was only for .zir
     files.
 * Test harness: friendlier diagnostics when an unexpected set of errors
   is encountered.
 * zir_sema: fix analyzeInstBlockFlat by properly calling resolvingInst
   on the last zir instruction in the block.

Compile log implementation:
 * Write to a buffer rather than directly to stderr.
 * Only keep track of 1 callsite per Decl.
 * No longer mutate the ZIR Inst struct data.
 * "Compile log statement found" errors are only emitted when there are
   no other compile errors.

-femit-zir and support for .zir source files is regressed. If we wanted
to support this again, outputting .zir would need to be done as yet
another backend rather than in the haphazard way it was previously
implemented.

For parsing .zir, it was implemented previously in a way that was not
helpful for debugging. We need tighter integration with the test harness
for it to be useful; so clearly a rewrite is needed. Given that a
rewrite is needed, and it was getting in the way of progress and
organization of the rest of stage2, I regressed the feature.
2021-01-16 22:51:01 -07:00
Luuk de Gram
6c19aeddca Add tests and move tests to wasm's own file 2021-01-16 14:58:04 +01:00
Jakub Konka
b204ea0349 macho: ensure that strtab always follows symtab
In rare occassions, it may happen that string table is allocated free
space preceeding symbol table. This is an error in the eyes of the `dyld`
dynamic loader and thus has to forbidden by the linker.
2021-01-15 23:22:28 +01:00
Jakub Konka
4ffa8952cc macho: add x86_64 tests 2021-01-13 23:55:56 +01:00
Andrew Kelley
76870a2265 Merge pull request #7700 from FireFox317/more-stage2-stuff-llvm
stage2: improvements to LLVM backend
2021-01-06 16:06:32 -08:00
Timon Kruiper
b1cfa923be stage2: rename and move files related to LLVM backend 2021-01-06 10:52:20 +01:00
g-w1
ab5f7b5156 stage2: add compile log statement 2021-01-05 18:43:41 -07:00
Timon Kruiper
0151f3b76a stage2: Add support for testing LLVM enabled builds in test-stage2
To make sure that we don't have to rebuild libc for every case, we now
have a seperate cache directory for the global cache, which remains
the same between test runs.

Also make sure to destory the Compilation before executing a child process,
otherwise the compiler deadlocks. (#7596)
2021-01-03 21:13:38 +01:00