Commit Graph

7786 Commits

Author SHA1 Message Date
Jakub Konka
8bc95b22dc x64: sub is non-commutative 2022-02-22 21:56:34 +01:00
Andrew Kelley
b23f10b424 Sema: fix comptime coercion of payload to error union 2022-02-22 13:53:10 -07:00
Andrew Kelley
0d422ce342 Sema: auto-numbered enums increment from last tag value
This matches stage1 and the existing behavior tests.
2022-02-22 12:44:35 -07:00
Veikka Tuominen
df38c46bee Merge pull request #10929 from davidmrt98/cbe
stage2: C backend: fix codegen for field_ptr/elem_ptr values
2022-02-22 15:25:50 +02:00
Andrew Kelley
c2a9a591f6 Sema: fix union auto-enum numbering 2022-02-21 23:50:20 -07:00
Andrew Kelley
9dc98fbabb Sema: fix comptime union initialization
The mechanism behind initializing a union's tag is a bit complicated,
depending on whether the union is initialized at runtime,
forced comptime, or implicit comptime.

`coerce_result_ptr` now does not force a block to be a runtime context;
instead of adding runtime instructions directly, it forwards analysis to
the respective functions for initializing optionals and error unions.

`validateUnionInit` now has logic to still emit a runtime
`set_union_tag` instruction even if the union pointer is comptime-known,
for the case of a pointer that is not comptime mutable, such as a
variable or the result of `@intToPtr`.

`validateStructInit` looks for a completely different pattern now; it
now handles the possibility of the corresponding AIR instruction for
the `field_ptr` to be missing or the corresponding `store` to be missing.
See the new comment added to the function for more details. An
equivalent change should probably be made to `validateArrayInit`.

`analyzeOptionalPayloadPtr` and `analyzeErrUnionPayloadPtr` functions now
emit a `optional_payload_ptr_set` or `errunion_payload_ptr_set`
instruction respectively if `initializing` is true and the pointer value
is not comptime-mutable.

`storePtr2` now tries the comptime pointer store before checking if the
element type has one possible value because the comptime pointer store
can have side effects of setting a union tag, setting an optional payload
non-null, or setting an error union to be non-error.

The LLVM backend `lowerParentPtr` function is improved to take into
account the differences in how the LLVM values are lowered depending on
the Zig type. It now handles unions correctly as well as additionally
handling optionals and error unions.

In the LLVM backend, the instructions `optional_payload_ptr_set` and
`errunion_payload_ptr_set` check liveness analysis and only do the side
effects in the case the result of the instruction is unused.

A few wasm and C backend test cases regressed, but they are due to TODOs
in lowering of constants, so this is progress.
2022-02-21 23:49:38 -07:00
Andrew Kelley
6dc5ce931c Merge pull request #10959 from joachimschmidt557/stage2-aarch64
stage2 AArch64: misc improvements
2022-02-22 01:30:49 -05:00
joachimschmidt557
25f73224f7 stage2 AArch64: pass a few more behavior tests 2022-02-21 23:05:16 +01:00
joachimschmidt557
2ba1ef165a stage2 AArch64: implement genSetReg for ptr_stack_offset 2022-02-21 22:54:14 +01:00
joachimschmidt557
ec62e76455 stage2 AArch64: replace genMulConstant with binOp 2022-02-21 22:54:09 +01:00
joachimschmidt557
19c683fab0 stage2 AArch64: distinguish between sp/wsp and xzr/wzr 2022-02-21 22:44:47 +01:00
joachimschmidt557
a9154a7eaf stage2 AArch64: implement storing to memory 2022-02-21 22:44:40 +01:00
Andrew Kelley
74303a3d95 Merge pull request #10925 from Vexu/stage2
stage2: support anon init through error unions and optionals
2022-02-21 14:18:17 -05:00
gwenzek
628e9e6d04 enable Gpu address spaces (#10884) 2022-02-21 14:05:27 -05:00
Steven Fackler
2c8541bdde Support -Wl,--soname 2022-02-20 13:56:12 -05:00
David John
bdb5713941 stage2: fix typo in riscv64/Emit.zig 2022-02-20 19:10:54 +01:00
Luuk de Gram
bb05a8a08a stage2: Fix 32bit builds 2022-02-20 18:16:28 +01:00
Veikka Tuominen
a5ac062689 stage2: make field/array base ptr work at comptime 2022-02-20 11:59:49 +02:00
Andrew Kelley
7d9e3840bb Sema: fix inline break from a non-comptime scope to outer one
Prior to this, the compiler would hit an assertion because the
break_inline would not successfully move the compile-time control flow.
2022-02-20 00:20:29 -07:00
Andrew Kelley
01638c250f Sema: implement readFromMemory for arrays 2022-02-20 00:08:05 -07:00
Andrew Kelley
bfff8544e1 AstGen: emit break_inline for corresponding inline loops
Prior to this commit there would be a `break` ZIR instruction to break
from a `block_inline` which is a mismatch.
2022-02-19 20:26:57 -07:00
Veikka Tuominen
a2533e6fca stage2: validate struct/array init ty 2022-02-20 02:11:06 +02:00
Veikka Tuominen
6f0601c793 stage2: support anon init through error unions and optionals at runtime 2022-02-20 02:11:02 +02:00
Andrew Kelley
8841a71aa6 AstGen: evaluate comptime var init expressions in a comptime context 2022-02-19 15:11:18 -07:00
Andrew Kelley
746435a954 Sema: implement @typeInfo for list literals 2022-02-19 15:11:18 -07:00
Veikka Tuominen
27c63bf433 stage2: implement errunion_payload_ptr_set 2022-02-19 20:48:00 +02:00
Veikka Tuominen
89f6ff1771 stage2: correct use of .unwrap_err_union_* in LLVM and C backend 2022-02-19 20:21:48 +02:00
Veikka Tuominen
e027492243 stage2: support anon init through error unions and optionals 2022-02-19 20:21:19 +02:00
Jakub Konka
539bb8a2d7 Merge pull request #10927 from ziglang/x64-idiv-imul
stage2,x64: implement integer division
2022-02-19 17:35:58 +01:00
Jakub Konka
da86839af0 x64: clean up implementation of divs, mod, rem for integers 2022-02-19 14:24:03 +01:00
Jakub Konka
bd396d7e07 x64: add unsigned div and move logic into a helper fn 2022-02-19 14:24:03 +01:00
Jakub Konka
2c13a4b87e x64: implement div_exact for ints (signed+unsigned) 2022-02-19 14:24:03 +01:00
Jakub Konka
1f4aa5ef78 x64: add lowering for single operand imul and idiv 2022-02-19 14:24:03 +01:00
David Martschenko
176f7b8600 C backend: adjust order of parameters in renderDeclName 2022-02-19 13:05:09 +01:00
David Martschenko
4a6454fb8d C backend: fix codegen for field_ptr/elem_ptr values 2022-02-19 13:04:59 +01:00
joachimschmidt557
669603029e stage2 ARM: implement airCmp with binOp lowering mechanism 2022-02-19 12:12:29 +01:00
joachimschmidt557
c29bf2f51a stage2 ARM: move shl, shr to binOp lowering mechanism 2022-02-19 12:06:34 +01:00
joachimschmidt557
3b1762bb47 stage2 ARM: fix boolean and bitwise not 2022-02-19 12:06:34 +01:00
joachimschmidt557
7b833b2fba stage2 ARM: move {bool,bit}_{or,and} to binOp lowering mechanism 2022-02-19 12:06:34 +01:00
joachimschmidt557
985a442f46 stage2 ARM: move mul to binOp lowering mechanism 2022-02-19 12:06:34 +01:00
joachimschmidt557
67e3346633 stage2 ARM: move add and sub to new binOp lowering mechanism 2022-02-19 12:06:30 +01:00
joachimschmidt557
23915c2c44 stage2 ARM: simplify invocations of genInlineMemcpy 2022-02-19 12:04:54 +01:00
Andrew Kelley
2e1c16d649 Merge pull request #10924 from ziglang/air-independence-day
AIR independence day
2022-02-19 02:57:48 -05:00
Andrew Kelley
4e1e5ab622 stage2: make AIR not reference ZIR for inline assembly
Instead it stores all the information it needs to into AIR.

closes #10784
2022-02-18 19:41:32 -07:00
Andrew Kelley
32edb9b55d stage2: eliminate ZIR arg instruction references to ZIR
Prior to this commit, the AIR arg instruction kept a reference to a ZIR
string index for the corresponding parameter name. This is used by DWARF
emitting code. However, this is a design flaw because we want AIR
objects to be independent from ZIR.

This commit saves the parameter names into memory managed by
`Module.Fn`. This is sub-optimal because we should be able to get the
parameter names from the ZIR for a function without having them
redundantly stored along with `Fn` memory. However the current way that
ZIR param instructions are encoded does not support this case. They
appear in the same ZIR body as the function instruction, just before it.
Instead, they should be embedded within the function instruction, which
will allow this TODO to be solved. That improvement is too big for this
commit, however.

After this there is one last dependency to untangle, which is for inline
assembly. The issue for that is #10784.
2022-02-18 16:56:12 -07:00
Cody Tapscott
db80dff4e0 Add backend-specific skips for bitreverse, byteswap tests 2022-02-18 14:28:32 -07:00
Cody Tapscott
ef417f19e1 stage2: Implement @bitReverse and @byteSwap
This change implements the above built-ins for Sema and the LLVM
backend. Other backends have had placeholders added for lowering.
2022-02-18 14:28:32 -07:00
Andrew Kelley
60bb1d4e1c Merge pull request #10906 from topolarity/cbe-array-support
stage2 CBE: Implement 2D array support
2022-02-18 14:08:06 -05:00
Andrew Kelley
736b9dcdd6 Merge pull request #10858 from topolarity/stage2-bitcast
stage2 sema: Fix sign handling of exotic integers in `@bitCast`
2022-02-18 13:49:00 -05:00
Jakub Konka
5af9d0c603 Merge pull request #10916 from ziglang/x64-args-stack-debug
stage2,x64: pass all args on stack in debug and if not extern fn
2022-02-18 15:18:01 +01:00